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Doubles Acceleration Eliminates the Need for an RISC Co-Processor High Performance Accelerators and Peripheral Interfaces

Texas Instruments, Inc. combines the logic of PHY processing with the reasoning of MAC processing onto a single chip, advancing the functionality of digital signal processors (DSPs) for complex, multiprocessing Beyond 3G cellular infrastructure applications such as HSPA/HSPA+, LTE and WiMAX Wave 2. The model TMS320TCI6484 single-core, 65 nm, 1 GHz DSP also doubles acceleration, delivering improved data throughput and reduced latency for better quality of service, and potentially eliminating the need for an RISC co-processor. Base station OEMs can either lower their system cost through chip-reduction or increase their system density by supporting more carriers or channels per card. It includes additional high performance accelerators and peripheral interfaces which are optimized for cellular infrastructure products.

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