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Texas Instruments Inc. (TI) announces a clock multiplier that integrates three on-chip phase locked loop (PLL) components to provide flexibility and performance, including cutting period jitter by up to 70% compared to existing solutions and minimizing electromagnetic interference (EMI). Each of the device's six outputs can be programmed in-circuit or during operation for any clock frequency up to 300 MHz. Developed in the company’s radio frequency (RF) Silicon-Germanium process, the three PLLs of the CDCE706 can accept a crystal, LVCMOS or differential input and generate six clocks from a single clock source. Using on-chip EEPROM technology, designers can easily program and save the device's register settings in non-volatile memory so that no re-programming is required at power-up. Designers can also use the 2-wire SMBus interface to reprogram the outputs as needed while the device is in the system. In addition, the device features flexible output settings such as enable, disable, low-state, signal inversion, slew-rate control of 0.6 ns to 3.3 ns, and variable output supply voltage of 2.3 V to 3.6 V.

Texas Instruments Inc.