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World’s First JEDEC JESD204A-based Data Converters Demonstrated at IMS 2009

NXP announces a broad commitment to high speed data converters featuring the new JEDEC JESD204A serial interface standard. The JEDEC-based data converters lead NXP’s forthcoming portfolio of new high-speed 16-bit Analog-to-Digital Converters (ADCs) and new high-speed 16-bit Digital-to-Analog Converters (DACs).

Underscoring its commitment to the JEDEC interface standard, NXP is demonstrating a JESD204A-compliant data converter in the NXP booth during the show. The demonstration will showcase the interoperability of NXP’s DAC1408D650, a dual-channel, four JESD204A data lane, 650 MSample/sec DAC with a Xilinx Virtex-5 FPGA.

Fully interoperable with cost-effective FPGAs from Lattice, Altera and Xilinx, NXP’s JEDEC JESD204A  ADCs and DACs deliver outstanding analog domain dynamic performance. Compared to conventional parallel digital interfaces, the new JEDEC serial digital interface gives high-speed data acquisition engineers a compelling design-in option.

The new JEDEC JESD204A interface can utilize as few as 6 I/O interconnect signals for a similar dual-channel data converter when compared with the  older style 16-bit parallel LVDS interfaces which consume as many as 64 I/O interconnect signals.

The JEDEC JESD204A interface also provides higher interconnect signal integrity, single-bit error detection, and enables system performance scalability without PCB design changes. These technical merits render significant commercial advantages for system designers including lower system cost, increased system reliability, higher functional integration, faster time-to-market and reduced design complexity.

Targeted at macro cellular basestations, medical imaging equipment, high-speed instrumentation, video broadcast equipment, and military data acquisition applications, the new data converters highlight NXP’s renewed commitment to the high-speed data converter market.

Visit us at Booth 2403
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