Sunday, September 07, 2008

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Security System Offers Protection for FPGA Designs

PNS?
Maxim Integrated Products unveils its 1-Wire secure memory devices that add additional security to designs using the Altera Cyclone III and Cyclone II FPGA families. These secure memory devices incorporate the Secure Hash Algorithm (SHA-1), a thoroughly scrutinized public hash protocol developed by National Institute of Standards and Technology (NIST), and the 1-Wire interface. This combination of technologies results in a challenge-and-response authentication scheme that prevents unauthorized cloning of OEM FPGA designs. Once the FPGA determines that it is communicating in an authorized environment, it transitions to normal operation by enabling all the functions defined by the customer-specific configuration code stored in the SRAM. If the authentication sequence fails, the FPGA can either disable system operation or set system operation to reduced functionality.
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Wireless Design & Development
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